The semiconductor industry is projected to reach $1 trillion by 2030, driven by growing demand for intelligence and connectivity. Specialized silicon accelerators are essential to meeting power and performance goals, but traditional design flows struggle to keep pace. To meet these demands, the industry needs orders-of-magnitude improvements in design productivity over the next decade to lower costs, expand accessibility, and drive silicon innovation.
Rise Design Automation addresses these challenges with a unique combination of raised design abstraction, a comprehensive high-level toolchain, and a seamlessly integrated generative AI solution. Built with industry-first high-level agents and easily deployable pretrained large language models(LLM’s), Rise translates natural-language intent into human-readable, modifiable, and verifiable high-level design code—reducing manual effort and accelerating adoption.
Only this combination of a human in the loop with AI-driven automation and raised abstraction beyond traditional RTL – which eliminates the need for potentially sensitive RTL-based training data – can unlock the productivity gains required to meet industry demands. It makes generative AI practical for design while enabling teams to deliver designs that meet QoR, are verifiable, and implementable with modern design flows—just much faster and easier.
Overview of Rise Design Automation
Discover the tools and methodologies that raise design abstraction beyond RTL by integrating generative AI with established design practices.
High-Level Code Fundamentals
Learn how to use SystemVerilog, C++, or SystemC for high-level design, focusing on untimed and loosely-timed code to optimize productivity and Quality of Results (QoR).
High-Level Verification and Implementation
Explore how Rise’s shift-left approach integrates early verification and implementation estimation to achieve faster simulation (30x to 1000x), early bug detection, and improved verification confidence.
Generative AI Integration
See how Rise applies generative AI to transform natural-language intent into human-readable, modifiable, and verifiable high-level design and verification code. Discover how existing deployable AI models built on pretrained LLMs coupled with domain and tool expert high-level agents provide a shift-left advantage.
Design Engineers: Explore practical methods to enhance design productivity and quality through high-level abstraction and AI-guided optimization.
Verification Engineers: Learn techniques for integrating early verification, reducing risk, and minimizing tedious work.
Technical Senior Hardware Designers: For insights into using AI-driven high-level design to generate reliable, implementation-ready RTL.
Project Leads: For strategies on managing design trade-offs while integrating advanced design automation tools.
System Architects: For approaches to early architectural modeling and validation, ensuring robust design flows and reducing late-stage modifications.
Mike Fingeroff, Chief of High-Level Synthesis (HLS) With over 20 years of experience in hardware design automation, Mike has specialized in High-Level Synthesis (HLS), focusing on machine learning and early performance modeling using SystemVerilog, SystemC, and MatchLib. He is the author of The High-Level Synthesis Blue Book, and his expertise includes C++, SystemC, and video and wireless algorithms. 
Allan Klinck, Co-Founder
Allan is a co-founder of RDA and a technology leader with expertise in high-level design and AI/ML frameworks for verification. He has driven innovation in verification and low-power technologies, helping teams enhance efficiency and performance in modern, complex designs. 
Ellie Burns currently serves as the Head of Marketing at Rise Design Automation (RDA). With over 30 years of experience in the semiconductor and EDA industries, she has held diverse roles in engineering, applications engineering, technical marketing, product management, and senior leadership, specializing in driving business growth through strategic marketing. 